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Research Article

An open circuit fault-tolerant seven-level inverter with symmetric sources and reduced switch count

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Article: 2276121 | Received 23 Apr 2021, Accepted 30 Jun 2023, Published online: 04 Dec 2023
 

Abstract

In this study, a new structure of symmetrical multilevel inverter is proposed. The proposed structure offers fewer controlled switches, power diodes, DC sources voltage stress across switches and losses compared with classical and a few recently proposed topologies in the literature. This paper presents a fault-tolerant (FT) seven-level inverter to provide uninterrupted supply to the connected load under open circuit fault in any single switch of the presented configuration. This configuration uses only six unidirectional and one bidirectional switch for any switch fault-tolerant operation. The phase opposition disposition sinusoidal pulse width modulation (POD-SPWM) and phase disposition sinusoidal pulse-width modulation (PD-SPWM) scheme are used for proper DC link utilisation in seven-level output voltage. The proposed symmetrical 7-level topology requires fewer power components and offers reduced voltage total harmonic distortion (THD) compared to other multi-level inverter (MLI) topologies. This MLI is investigated in MATLAB and validated using hardware in the loop platform of OPAL-RT. The obtained results are presented to demonstrate the successful FT operation under any single switch open circuit fault.

Disclosure statement

No potential conflict of interest was reported by the author(s).

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