A graph-theoretic multiple logic fault analysis through petri-nets

Abstract

In this paper a new and a graph theoretic approach based on Petrinet model for calculating any order Boolean Difference has been suggested. The concept of Boolean Difference has also been extended to generate a complete test set for all possible multiple faults on any number of lines of a logic circuit. The approach is based on the study of the system of open paths in an acyclic graph and on some basic theorems established in the paper. Unlike algebraic methods, this method is suitable for machine computation and is therefore, applicable to arbitrarily large circuits.

Keywords:

• Boolean Difference
• complete test set
• directed path
• fault detection
• multiple fault
• petrinet modeling of logic circuit
• set of input combination
• subnet for a transition
• strongly connected graph
• valid subnet

C.R. Categories:

• B.6.2