Low-voltage, low-power current monitor for deep-submicron testing

Abstract

An on-chip low-power circuit for both quiescent current I _ddq and transient current I _ddt monitoring is presented. The current monitor performs faster and is significantly smaller than those reported previously. The monitor is designed for low-voltage digital CMOS circuits (1.5V). The same design can be used in the testing of analogue and mixed signal circuits. The effect on the circuit under test performance is negligible. Testing speeds of up to 25MHz can be achieved (including the 4-bit A/D converter, 100MHz without the converter). The monitor has been implemented in 0.5μm and 0.35μm CMOS technology and tested successfully on parallel chains of inverters as circuit under test. Two types of fault (an open fault and a short fault) have been observed. Simulation and experimental results are included and analysed.