Reconfigurable modular arithmetic logic unit supporting high-performance RSA and ECC over GF( p)

Abstract

This paper presents a reconfigurable hardware architecture for public-key cryptosystems. By changing the connections of coarse grain carry-save adders (CSAs), the datapath provides high performance modular operations that can be used for both RSA and elliptic curve cryptography (ECC). In addition, we introduce reconfigurable flip-flops in order to make an optimal choice of hardware resources. The proposed datapath is implemented with a 0.25-µm complementary metal oxide semiconductor (CMOS) technology and on a field programmable gate array (FPGA). We compare the performance of modular exponentiation for RSA and scalar multiplication for ECC based on the prototype implementation. The results show that higher performance is obtained for ECC on the same hardware platform.

Keywords:

• Public-key cryptosystem
• RSA
• Elliptic curve cryptography (ECC)
• FPGA implementation
• Reconfigurable architecture

Acknowledgements

Kazuo Sakiyama, Nele Mentens and Lejla Batina are funded by FWO projects (G.0450.04, G.0475.05). This research has been also supported by IBBT-QoE and the EU IST FP6 projects SESOC, ECRYPT.