A multiobjective scatter search algorithm for fault-tolerant NoC mapping optimisation

Abstract

Mapping IP cores to an on-chip network is an important step in Network-on-Chip (NoC) design and affects the performance of NoC systems. A mapping optimisation algorithm and a fault-tolerant mechanism are proposed in this article. The fault-tolerant mechanism and the corresponding routing algorithm can recover NoC communication from switch failures, while preserving high performance. The mapping optimisation algorithm is based on scatter search (SS), which is an intelligent algorithm with a powerful combinatorial search ability. To meet the requests of the NoC mapping application, the standard SS is improved for multiple objective optimisation. This method helps to obtain high-performance mapping layouts. The proposed algorithm was implemented on the Embedded Systems Synthesis Benchmarks Suite (E3S). Experimental results show that this optimisation algorithm achieves low-power consumption, little communication time, balanced link load and high reliability, compared to particle swarm optimisation and genetic algorithm.

Keywords:

• Network-on-Chip
• mapping
• scatter search
• routing
• fault-tolerant

Acknowledgements

This research is supported in part by the National Natural Science Foundation of China (No. 60973016, No. 61272175), the National Basic Research Program of China (973 Program: No. 2010CB328004), and the Youth Backbone Teacher Foundation of Chengdu University of Technology (No. JXGG201305).