Memstor, memstance simulations via a versatile 4-port built with new adder and subtractor circuits

Abstract

In this paper, novel voltage-mode (VM) n-channel metal-oxide semiconductor (NMOS) transistor-based analogue adder and subtractor circuits, which, respectively, perform V₁+V₂ and V₁−V₂ operations, are presented. The most important feature of the proposed circuits is their extremely simple structures containing only six NMOS transistors. Further, the presented adder and subtractor circuits have high input and low output impedances, resulting in easy cascadability. The post-layout simulations of the proposed circuits have been executed using TSMC 0.25 µm process parameters with ±1.25 V. The area of the suggested circuits is approximately 30 × 13 µm². Moreover, the topology of a generalised mutator, a versatile 4-port built with an adder and a subtractor, which acts as an ordinary mutator when properly reduced to a 2-port, is offered. A table for simulating lossless inductance, memristor, meminductor, memcapacitor and other elements under suitable termination of the 4-port is given, and three of these elements’ simulations with SPICE are also presented.

Keywords:

• analogue adder
• analogue subtractor
• mutator
• inductance simulators
• memristor
• meminductor
• memcapacitor

Acknowledgement

The authors would like to express their gratitude to Elham Minayi for running some of the simulations and helping with typesetting of the manuscript.