ABSTRACT
With the aggressive scaling of integrated circuit technology, parametric estimation is a critical task for designers who looked for solutions to the challenges of some Nanoscale CMOS parameters. This paper presented the prediction of primary parameters of CMOS transistor for 16 nm to 10 nm process nodes using both of Bisquare Weights (BW) method and a novel recursive least squares (RLS) parameter estimation algorithm. The proposed RLS algorithm consists of the minimisation of a quadratic criterion relating to the prediction error in order to attain the best estimated parameters of the developed mathematical model. The obtained results thanks to the proposed RLS algorithm were better than those reached using the BW method. Comparisons between Predictive Technology Model (PTM) data and parameters estimated with RLS algorithm were made to check the validity and the consistency of the proposed algorithm. These predicted primary parameters were helpful to estimate and to optimise the performances of the Variable Gain Amplifier (VGA) which was a basic circuit element with a key role in the design of new upcoming receivers.
Disclosure statement
No potential conflict of interest was reported by the authors.