Testable designs of one-count generators

Abstract

Testable realizations of One-Count Generators (OCGs) with respect to an extended fault model, including the stuck-at, transistor stuck-open, and transistor stuck-on faults using current monitoring, are presented. These implementations are made up of testable components which are commonly found in current CMOS libraries. A new design method for OCGs is given which offers the ability to apply a desired robust pair of vectors at the inputs of every element of the OCG (and hence any desired single vector to them), as well as the ability to propagate the effect of any single fault to a primary output of the OCG.