Optimal cutting design and analysis for fault-tolerant scheme of redundant memories

Abstract

Fault-tolerant design for memory production is beginning to play an important role in increasing the yield rate of manufacturing. To improve the reliability of memory manufacturing, there are many methods that have been proposed. One of the most used technologies is replacing the faulty cells with spare memory interleaved in the memory. Nowadays, laser-cutting technology improves the yield of memories because of the enhancement of the use of spare lines. However, the issue of choosing a cutting location significantly affects the utilisation of spare lines. A bad cutting location can even render it useless. To use spare lines more efficiently, this article proposes two algorithms. The first one is designed to seek out a good cutting location. It corrects some defects of previous algorithms and provides a better approach to finding cutting candidates. In addition, because most heuristic solution-finding algorithms do not work properly under the condition of cutting memory, the second algorithm, called modification of most-repair is proposed to help make the decision as to whether or not a solution exists for the faulty pattern. We can find an optimal solution by combing these two algorithms. The experimental results show that our proposed algorithms increase the reparable percentage of a 1024-by-1024 memory from 55 to 100% and also improve both the reliability of memory manufacturing and the flexibility of spare lines.

Keywords:

• pare cutting approach
• spare cutting approach
• memory reconfiguration problem
• redundant memory
• fault-tolerant

Acknowledgement

The work described in this article was supported by the National Science Council, Taiwan, under Grant NSC 97-2221-E-007-052-MY3 and NSC-98-2221-E-007-067, and also substantially supported by a grant from the Ministry of Economic Affairs of Taiwan (Project no. 98-EC-17-A-02-S2-0097).