Si/SiGe heterostructures for advanced microelectronic devices

Abstract

The permanent size reduction and increasing complexity of microelectronic structures is accompanied by drastic requirements on ultra-thin layer quality. This is the case for Si _x Ge_{1− x} ultra-shallow junctions and locally doped nanostructures such as quantum wells, wires or dots. For example, the new generation of Si/Si _x Ge_{1− x} -based micro- and optoelectronic devices, e.g. velocity modulation field effect transistor, resonant tunnelling diode, single electron transistor, requires accurate control of surface and interface roughness, almost 0-defect structures and very sharp doping profiles in both p- and n-type material. There exist several difficulties. The first one is the strain control and adjustment (from fully strained to fully relaxed 2D and 3D nanostructures), which also determines the morphological evolution of thin Si_{1− x} Ge _x layers and the development of growth instability. The second problem is the doping redistribution during growth, which combines thermodynamics (driving force) and kinetics (exchange rate) mechanisms. The third problem is the 0-defect requirement for ultra-thin doped junctions. In this article, we give an overview of the new insights obtained during the last years in these three domains and we present the physical properties of the structures realised.

Keywords:

• SiGe
• heterostructure
• molecular beam epitaxy
• stress engineered structures
• electrical, optical and structural properties

Acknowledgements

We wish to thank all our collaborators who contributed by their work to the present report. We also thank the ANR grant MEMOIRE for financial support. We thank Nanotec Electronica for providing free WSxM software for AFM image analysis.