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Abstract
This paper describes nPSA, a parallel algorithm for distributed asynchronous simulation of digital circuits with nominal delays in a massively parallel SIMD environment. Glitch detection and suppression are included, together with a discussion of other factors, such as recon-vergent fan-out and feedback lines. A new set of metrics is also proposed for evaluation purposes. nPSA combines demand-driven and deadlock avoidance protocols in order to deliver high performance compared to typical synchronous parallel simulators. Although its performance greatly depends on the quality of circuit embedding on the host machine, nPSA is independent of the computer architecture and communication protocol used.