A design and its practical application to the pseudo two-step successive-approximation register analog-to-digital converter with the active charge transfer technique

Abstract

A pseudo two-step successive-approximation register (SAR) analog-to-digital converter (ADC) that uses an active charge transfer technique instead of directly amplifying the residue signal is proposed to achieve the advantages of lower capacitive loading and less design effort. The proof-of-concept prototype was designed using standard 0.18-μm 1P6M complementary metal-oxide-semiconductor technology to verify the functionality of the proposed technique. Due to the simple structure and low capacitive loading features, the proposed SAR ADC is easily combined with other circuitry to extend the practical applications, including battery capability measurement, replacement of the galvanometer for the Wheatstone bridge, and voltage measurement by combining the designed ADC with a field-programmable gate array device.

Keywords:

• Two-step
• successive-approximation register (SAR)
• analog-to-digital converter (ADC)
• active charge transfer technique
• measurement

Acknowledgments

The authors also would like to express their gratitude to the National Chip Implementation Center, Taiwan, R.O.C., for supporting the environment of chip design, simulation, and measurement.