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M Jagadesh Kumar
M Jagadesh Kumar was born in Mamidala, Nalgonda Distric, Andhra Pradesh, India. He received the MS and PhD degrees in electrical engineering from the Indian Institute of Technology, Madras, India. From 1991 to 1994, he performed post-doctoral research in modeling and processing of high-speed bipolar transistors with the Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ON, Canada. While with the University of Waterloo, he also did research on amorphous silicon TFTs. From July 1994 to December 1995, he was initially with the Department of Electronics and Electrical Communication Engineering, Indian Institute of Techno logy, Kharagpur, India, and then joined the Department of Electrical Engineering, Indian Institute of Technology, Delhi, where he became an Associate Professor in July 1997 and a Full Professor in January 2005. His research interests are in VLSI device modeling and simulation for nanoscale applications, integrated-circuit technology, and power semiconductor devices. His teaching has often been rated as outstanding by the Faculty Appraisal Committee, IIT Delhi.
Dr Kumar is a Fellow of Institution of Electronics and Telecommunication Engineers (IETE), India. He has reviewed extensively for different journals including IEEE Trans on Electron Devices, IEE Proc on Circuits, Devices and Systems, Electronics Letters and Soiid-state Electronics. He was Chairman, Fellowship Committee, The Sixteenth International Conference on VLSI Design, January 4–8, 2003, New Delhi, India. He is Chairman of the Technical Committee for High Frequency Devices, International Workshop on the Physics of Semiconductor Devices, December 13–17, 2005, New Delhi.