HTM: a new hierarchical interconnection network for future generation parallel computers

ABSTRACT

In this paper, we have discussed the architectural structure, static network performance, and dynamic communication performance of a new hierarchical interconnection network called hierarchical Tori connected mesh network (HTM). For the exploration of static network performance, we have evaluated degree, diameter, cost, average distance, arc-connectivity, bisection width, and wiring complexity. We have also evaluated the dynamic communication performance of HTM, its counter rival H3DM, and conventional mesh and torus networks using a deadlock-free dimension order routing using two virtual channels under uniform and non-uniform traffic patterns. The dynamic communication performance is evaluated using computer simulation. We discovered that the HTM has a number of lucrative properties. These include constant node degree, small diameter, low cost, small average distance, moderate (neither too low, nor too high) bisection width, and less wiring complexity. HTM also yields high throughput per link and very low zero load latency, which provide better dynamic communication performance than that of H3DM, mesh, and torus networks.

Keywords:

• Deadlock-free routing algorithm
• dynamic communication performance
• HTM network
• interconnection network
• static network performance
• traffic patterns

Acknowledgements

The preliminary work of this research is published in the Proc. of the 13th International Conference on Computational Science and Applications (ICCSA 2013) [14]. The authors are grateful to the anonymous reviewers for their constructive comments which helped to greatly improve the clarity of this paper.

Disclosure statement

No potential conflict of interest was reported by the authors.

Additional information

Funding

This work is supported in part by IIUM Endowment-B research fund EDW B11-169-0647, Research Management Center (RMC), IIUM, Malaysia.

Notes on contributors

M.M. Hafizur Rahman

M.M. Hafizur Rahman received the BSc degree in electrical and electronic engineering from Khulna University of Engineering and Technology (KUET), Khulna, Bangladesh, in 1996. He received the MSc and PhD degrees in information science from the Japan Advanced Institute of Science and Technology (JAIST) in 2003 and 2006, respectively. Dr Rahman is now an assistant professor in the Dept. of Computer Science, KICT, IIUM, Malaysia. Prior to joining the IIUM, he was an associate professor in the Dept. of CSE, KUET, Khulna, Bangladesh. He was also a visiting researcher in the School of Information Science at JAIST and a JSPS postdoctoral research fellow at Research Center for Advanced Computing Infrastructure, JAIST & Graduate School of Information Science (GSIS), Tohoku University, Japan in 2008 and 2009 & 2010–2011, respectively. His current research include parallel and distributed computer architecture, hierarchical interconnection networks, and optical switching networks. Dr Rahman is member of IEICE of Japan and IEB of Bangladesh.

E-mail: [email protected]

Asadullah Shah

Asadullah Shah received the undergraduate degree in electronics, the Master's degree in computer technology from the University of Sindh in 1984 and 1985, respectively. He received the PhD in multimedia communication, from the University of Surrey, England, UK in 1998. He is currently a professor at the Faculty of Information and Communication Technology of IIUM (International Islamic University Malaysia). Prior to joining the IIUM, he was teaching in IoBM (Institute of Business Management), Karachi, Pakistan; IBM (Institute of Business Administration) Sukkar, Pakistan and ISRA University Hyderabad, Pakistan. His areas of interest are multimedia compression techniques, research methodologies, speech packetization, and statistical multiplexing. He has been teaching courses in the fields of electronics, computers, telecommunications, and management sciences.

E-mail: [email protected]

Masaru Fukushi

Masaru Fukushi received the MS degree from Hirosaki University, Japan, in 1997 and the PhD degree in information science from the Graduate School of Information Science, Japan Advanced Institute of Science and Technology (JAIST), Ishikawa, in 2002. He is currently a research associate in the Graduate School of Information Science at Tohoku University, Japan. He was also a research associate in the Graduate School of Information Science at JAIST from 2002 to 2004. His research interests are fault-tolerant multi-processor systems and parallel image processing.

E-mail: [email protected]

Yasushi Inoguchi

Yasushi Inoguchi received the BE degree from the Department of Mechanical Engineering, Tohoku University in 1991, and received the MS and PhD degrees from Japan Advanced Institute of Science and Technology (JAIST) in 1994 and 1997, respectively. He is currently a professor of RCACI at JAIST. He was a research fellow of the Japan Society for the promotion of Science from 1994 to 1997. He is also a researcher of PRESTO program of Japan Science and Technology Agency from 2002 to 2006. His research interest has been mainly concerned with parallel computer architecture, interconnection networks, GRID architecture, and high-performance computing on parallel machines. Dr Inoguchi is a member of IEEE and IPS of Japan.

E-mail: [email protected]