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Abstract
The arithmetic unit of a small digital computer, constructed for students' training in computer hardware, is described. It consists of a 16-bit accumulator, 16-bit factor register, 16-bit parallel adder, carry-in, carry-out and overflow flip-flops, three adder control flip-flops, shift counter and autonomous operations control gates. The adder is able to perform ADD/SUB, AND, OR, EX-OR, NAND, SHL and SHR operations. Subtraction is done by adding 2's complement. AND, OR, EX-OR and NAND are bitwise logical operations. Multiple shifts are possible by help of the shift counter and autonomous operations control.
The adder is able to generate a valid sum of two 16-bit numbers in less than 1 μsec., and the shifting takes place at the rate of one million shifts per second.
Like other subsystems in the computer, the arithmetic unit uses DTL NAND gates and type D flip-flops. The adder uses 8 NAND gates per bit. The complete unit is built with indigenously available components.