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Original Articles

Sixteen Bit Fractional Binary to Digital Medium Speed Converter with 4-Digit Display

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Pages 421-424 | Received 18 Dec 1973, Published online: 11 Jul 2015
 

Abstract

The design and development of a 16-bit fractional binary-to-decimal converter having 4-digit Nixie display are described. The conversion algorithm is of the type of recursive division and addition. The converter is implemented with ICs and is made of five plug-in boards. It is of medium complexity and has minimum conversion time of 3.2 μs. In the present form of this converter, manual operations involved are: Clear, Load and Convert. However, by a little modification of the loading circuits this converter can be fully automated and used for display with SA type of ADCs, CPU arithmetic outputs, etc.

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