Design of NAND/NOR Logic Networks—A New Approach

Abstract

Logic design techniques to reduce the NAND/NOR gate-count use AND/OR/NOT Boolean logic system and from there proceed to NAND/NOR realization. In this paper, an algebraic system with NAND and NOR operators is proposed. The proposed method is convenient for hand-execution. It seems that a computer algorithm can be developed which would be better than the existing branch-and-bound or enumeration methods.

Indexing Terms:

• NAND/NOR Algebraic System
• Logic Synthesis
• Hand-Execution
• Combinatorial Network