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Abstract
An efficient algorithm suitable for the analysis of any general configuration of thyristor circuits is described. This algorithm uses the state-variable approach. However, the computation of state equations for each mode is done in a more efficient manner than in the algorithms existing at present. This is done by using a master fundamental cutset matrix for the network from which the corresponding matrices for each mode are easily computed. Case studies carried out for typical thyristor circuits reveal considerable reduction in computation time in comparison with existing algorithms. The results of analysis of a dc chopper circuit are presented in detail.
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Notes on contributors
A.T. Dutta
Dutta, Anup T: (b. 1959 July 3) Received BE (1979) and M Tech (1981) from Visvesvaraya Regional College of Engg., Nagpur and IIT, Bombay respectively.
Joined Hindustan Computers Ltd, in July 1981, where he is at present an Asstt. Engineer. He is engaged in developing software/hardware diagnostics and self-test routines.
H. Narayanan
Narayanan, H (Dr): was born at Trivandrum in 1948. He received his BTech and PhD degrees in Electrical Engineering from the Indian Institute of Technology, Bombay in 1969 and 1974 respectively. He has been with the Faculty of IIT, Bombay since 1974 and is currently an Assistant Professor in the Electrical Engineering Department. His interests are primarily in the theory of matroids and its application to network analysis, in particular, to analysis procedures based on tearing.