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Abstract
Hardware realization of a double-error correcting (31,21) binary BCH codec is given using EPROM as a syndrome to error location mapping device. Parallel processing is used throughout. A programme to generate EPROM programming data is appended. Possible applications are discussed.
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Mohan A. Tambe
Tambe, Mohan: Did his BTech in EE from IIT, Kanpur in 1980 and MTech in CS from IIT, Kanpur in 1982. Currently he is working on Computer-Aided Modular Instrumentation System, and Integrated Devanagri Computer projects at IIT, Kanpur as a Research Engineer.