A Stray-Insensitive Switched-Capacitor Biquad with Reduced Number of Capacitors

Abstract

A new stray-insensitive switched-capacitor (SC) biquad with a reduced number of capacitors is proposed. It is first conceived in the continuous time domain and then obtained by replacing the resistances by their SC equivalents. For this biquad, two designs in s-domain, with as many equal-valued SCs as possible, are developed. One design allows independent variation of the pole-frequency, ω_p=2πf^p, and band width and the other allowes independent variation of ω_p and the pole-Q. It is shown that these s-domain designs approach the exact design in z-domain when the clock frequency fc⩾10fp. Finally, the equal-valued SCs are replaced by a single time-shared capacitor. The resulting biquad exhibits the same performance as the original one without the time shared-capacitor. Moreover, it uses a greatly reduced number of capacitors and thus it would require significantly less silicon area when implemented on a MOS chip. Practical results taken on a simulated biquad with discrete components are in close agreement with the theoretical ones.

Indexing terms:

• Switched-capacitor biquad