Abstract
This paper describes a two-dimensional etching-process simulator, TEPS, which includes a mesh structure generator for uniform/non-uniform grids. In order to simulate an etching profile, the input is first passed through a grid-generator. This grid-generator produces a rectangular two-dimensional mesh structure, which is used for simulating isotropic and anisotropic components of etching (to include ion, radical and wet etching). The numerical model proposed by Yamamoto et al for etching is, used to determine the location after etching. Triangulation of the rectangular elements of the mesh structure is also incorporated. It also reviews the work done in semiconductor process simulations used in Integrated Circuit (IC) fabrication.
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