A New Class of t-Error Correcting / d-Error Detecting (d > t) and All Unidirectional Error Detecting Codes

Abstract

In this paper, a new class of t-error correcting / d-error detecting and all unidirectional error detecting (t-EC/d-ED/AUED) codes has been proposed. Compared to the published results, this scheme, in general, needs less or equal number of check bits. Further, both the encoding I decoding algorithms for this class of codes can be implemented with faster and simpler hardware. In case of ROM implementation, the proposed scheme results in significant saving in word length.

Indexing terms:

• Error correction
• error detection
• Hamming distance
• unidirectional errors
• random errors
• parity check codes
• symmetric errors

Additional information

Notes on contributors

D K Bhattacharyya

D K Bhattacharyya, received his Masters Degree in Computer Application from Dibrugarh University, India in 1991. He received PhD degree in Computer Science from Tezpur University, India in 1999. From 1992–1995, he was associated with Department of Computer Engg and Application, Jorhat Engg College, India as a faculty member. Subsequently, in 1995 he switched to Tezpur University and associated as a faculty member in the Department of Computer Science. Presently, he is serving as a Reader in the Department of Information Technology of Tezpiur University. His major research interests include cryptography, error correction/detection and content-based image retrievals.

S Nandi

S Nandi, received his BSc (Phy), BTech and MTech Degrees from Calcutta University, India in 1984, 1987 and 1989 respectively. He received PhD degree in Computer Sc and Engg from IIT, Kharagpur, India in 1995. From 1989–1990 he was a faculty member in Birla Instt of Technology, Mesra, India. During 1990–1995, he was associated with IIT, Kharagpur, India as a senior Project Engineer. Since 1995, he is in IIT, Guwahati as a faculty member. Presently, he is an Associate Professor. He also served as Chairman, GATE-99 of IIT, Guwahati. He has published more than 35 research papers in Int'nl Journals. He is also co-author of a book on Additive Cellular Automata published by IEEE Computer Society Press. His present area of research are VSLI design and testing, Information Theory, Image Processing and applications of Cellular Automata, etc.