Abstract
An approach is developed for parallel detection and evaluation of arithmetic operations at inter instruction level. Parallelism exploitation is targeted at inter instruction level. Data dependence analysis is carried out since dependence will limit the number of parallel operations. Arithmetic expressions with +, -, *, / as permissible operators, variables and constants as operands are considered in the implementation. Transputers are used in the implementation.
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Notes on contributors
S Valli
S Valli is a Senior Lecturer in the School of Computer Science & Engineering, Anna University, Chennai. Her research interests include Parallel Computing, Object Oriented systems, Database Man-agement system, Networking and Software Engineering. She received her PhD from Anna University, Chennai.
V Sankaranarayanan
V Sankaranarayanan is Professor in Ramanujan Computing Centre, Anna University, Chennai. His research interests include Parallel and Distributed Computing. He received his PhD from IIT Madras.