Efficient Systolic Architecture for Implementation of 2-D Discrete Cosine Transform

Abstract

Recently, an efficient systolic array has been suggested by Chang and Wu[1] for the computation of discrete cosine transform (DCT), which involves only real arithmetic operations. In this paper, we have suggested another systolic array for implementing the DCT which has the same hardware requirement and yields the same throughput as that of [1]. The proposed linear array is complimentary to the existing array [1] in a sense that the output of the proposed arrays may be fed as the input for the existing arrays. This feature of the linear arrays has been utilised for designing a bilayer structure for computing the 2-D DCT. It is interesting to note that the proposed structure for the 2-D DCT does not require any hardware/time for the transposition of the intermediate results. The desired transposition is achieved by orthogonal alignment of the linear arrays of the upper layer with respect to those of the lower layer. The proposed structure provides high throughput of computation due to fully pipelined processing and massive parallelism employed in the bilayer architecture.

Indexing terms:

• Digital signal processing
• VLSI
• Discrete cosine transform

Additional information

Notes on contributors

S S Nayak

Sudhansu Sekhar Nayak born on 21 November 1951. He did his M Sc Physics, 1973 from Sambalpur University and PhD from Berhampur University. Presently he is working as Senior Lecturer in Physics and Coordinator, Computer Applications in SKCG College, Paralakhemundi, District Gajapati, Orissa. Undergoing research in Digital Signal Processing, Doing Wavelet Transform, Residual Number System and Artificial Neural Network. He has published papers in IEE, IEEE, Signal Processing. His name is listed in the international Directory of Marquis Who's Who (USA) also in Asia '500 edition.

P K Meher

Pramod Kumar Meher obtained his BSc, MSc and M Phil degrees from Sambal Pur University in 1976, 1978 and 1981, respectively. The same University awarded him with the PhD degree for his work in the field of Digital Signal processing. He has worked as Lecturer in Physics during 1981 to 1993 in Gangadhar Meher College, Sambalpur and other government colleges in Orissa. He was Reader in the Electronics Department of Berhampur University during 1993–1997. From 1997 onwards he is with Utkal University, Bhubaneswar as Professor in the Department of Computer Science & Application. Dr Meher's name is included in the Marqui's Who's Who in the World and has been conferred with the Samant Chandra Sekhar award on Engineering & Technology for the year 1999. He has published several papers in national and international journals, and contributed to many international conferences. His research interest includes mobile computing, adaptive signal processing, VLSI architectures for high performance computing and embedded systems.