Vedic Multiplier with Fast Carry Optimization

Abstract

Vedic Mathematics, developed about 2500 years ago, gives us a clue of symmetric computation. Vedic mathematics is long been known but has not been Implemented in the DSP and ADSP processors employing large number of multiplications in calculating the various transforms like FFTs and the IFFTs. This paper presents a novel Vedic multiplier architecture combined with fast carry approach in order to minimize the critical path delay and thus make a high-speed multiplier. Sequential digit by digit manipulation can be carried in parallel. Thus, few steps are needed in multiplication. The suggested approach was simulated and the speed was found to be greater than the standard array multiplier and hence serves as an alternative approach for multiplication.

Indexing terms:

• Algorithms
• Array multiplier
• Column compressor
• Critical path delay
• Fast carry
• parallel multiplier
• Vedic mathematics
• VHDL

Additional information

Notes on contributors

Om Vikas

Om Vikas is the senior Director and Head of the Human Centered Computing Division in the Ministry of Communications & Information Technology, Government of India. He is also national coordinator of the mission mode program on Technology Development for Indian Languages (TDIL) as well as the Digital Library of India initiative. His current research interests include Semantic Web, Parallel Computing, Natural Language Processing, Knowledge Management and Informatics Curricula Development. He received BTech (EE), MTech. (EE) and PhD from IIT, Kanpur. He has actively participated in the UNESCO Experts meetings on Multi-lingualism and Universal Access to Cyberspace, Unicode Consortium and World Wide Web Consortium.

Dr Om Vikas is Senior member of IEEE, Fellow of Institution of Electronics & Telecommunication Engineers, Fellow of Institution of Engineers (India), Fellow of Russian Academy of Informatiation of Education, Senior Member of Computer Society of India, member of IEEE Computer Society & IEEE Engineering Management Society. He is also founder member of NLP Association and Lok Vigyan Parishad (People's Science Society).

He has vast experience of R&D, Teaching, Projects planning and International Cooperation. He has been active member of several regional and international conference program committees. He is still an active researcher.

For his outstanding contributions in the field of ICT for masses, he received several awards such as “Vishisht Padak”, “Indira Gandhi Rajbhasha”, “Atmaram” and “Vigyan Bhushan”, and recently “VASVIK Industrial Research” Awards.