A Novel Centralized Flow Control Scheme for ABR Service in Wireless ATM Networks

Abstract

In this paper, we propose a novel Centralized Flow Control Scheme (CFCS) for ABR service in WATM network. The goal is to provide Quality-of-Service (QoS) guarantee to the users and to reduce the computational complexity at switches. A novel concept of monitoring the network status in the centralized controller in the form of rate allocation tables for flow control is the main theme of our algorithm. CFCS operates in ATM switches placed in the backbone of WATM network. The Network Controller Switch (NCS) monitors the current status of VC and bandwidth availability as well as tracking the current number of active sessions contending for capacity, to adjust the explicit bound in the source transmission rates. The simulation results show that the scheme is stable and efficient in achieving maximum utilization of bandwidth occupancies, enhancing average throughput and achieving robustness under continuously varying network conditions. The simulation experiments also demonstrate the superiority of the proposed scheme to the other schemes in dealing with switch complexity.

Indexing terms:

• ABR
• Bandwidth management
• Congestion control
• Link utilization
• Rate-based control
• WATM

Additional information

Notes on contributors

Rajkumar Deshpande

R S Deshpande received the BE degree in Electronics Engineering from Pune University, Pune in 1989 and ME degree in Electronics Engineering from Shivaji University, Maharashtra in 1996. Since 1989, he has been with Padmahsri Dr V Vikhe Patii College of Engineering, Ahmednagar where he is a Professor and Head of the Electronics Engineering Department. For the past 2 and half years, he was also working as Principal of this institute. He is receipent of National Merit Scholarship, and scholarship awarded by Gov of Japan (MONBUSHO) for study and research in Japan for 2 years. He is a life member of ISTE, IEEE, IE (India), IEICE (Japan) and Indian Science Congress. He has worked in data communications and more recently, has been involved in high-speed data transmission in ATM networks. He has published more than 25 research papers.

Prakash Vyavahare

P D Vyavahare received PhD in 1994 from IIT Bombay in the field of Computer Communication and M Tech in Electrical Engineering (with specialization in Communication Engineering) in 1976 from IIT Bombay. He worked as a communication engineer at Tata Institute of Fundamental Research, Bombay during 1976–1982. Since 1982 he is with the Department of Electronics and Telecommunication Engineering at SGSITS Indore, where presently he is working as Professor and Head of the Department. His area of interests includes performance evaluation of computer communication network. He was Hindu-Hitachi scholar during 1981–82 at Hitachi Ltd. Japan and Rotary GSE team member to USA in 1988. He is an associate of UNESCO-ICTP Italy since 1998. He has published 15 papers in national and international journals and 17 conference papers. He has guided one PhD thesis and is presently supervising 3 research scholars.