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Abstract
Strained-Si structures are promising candidates for enhancement of CMOS performance. Enhancement in drain current is observed from novel strained-Si MOSFETs. However, it might cause reliability problems as the temperature can rise by more than 100°C over ambient under typical static bias conditions. A full process-to-device simulation has been employed to study some of the reliability issues in strained-Si channel MOSFETs. The thermal behavior (self-heating) for strained-Si MOSFETs has been studied via ANSYS simulation. Modeling of self-heating in strained-Si MOSFETs is presented.
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S S Mahato
S S Mahato received the BSc degree in Electronics Science from the University of Calcutta, in 2002 and the MSc degree in Electronics Science from the University of Calcutta, in 2004. He is currently working in IIT Kharaaour. His current research interests include the TCAD, Characterization and Modelling of strained Si/SiGe MOSFETs.