Systematic Determination of Limits on Noise Figure and Distortion in Power Constrained Capacitive Desensitized CMOS LNAs

ABSTRACT

A systematic and generic approach is proposed to determine the minimum noise figure (NF), minimum second- and third-order harmonic distortion (HD₂, HD₃), and maximum input third-order intercept point (IIP3), achievable in a class of power constrained common source inductively degenerated low noise amplifiers (LNAs) using capacitance desensitization with and without multiple gated transistors. This is verified in complementary metal oxide semiconductor (CMOS) 180 nm technology. A Volterra series method is adopted to obtain closed-form expressions for both second- and third-order non-linearity. For validation, this analysis is applied to a highly linear single band LNA at 1.8 GHz and a linear dual band LNA at 2.8/3.4 GHz and corresponding limits on IIP3 and NF are established. To the best of the authors’ knowledge for the first time, such quantitative limits for obtaining a simpler design trade-off have been presented to the LNA design community.

Keywords:

• Capacitive desensitization
• IIP3
• Limits
• Low noise amplifier
• Noise figure

Additional information

Notes on contributors

Ritabrata Bhattacharya

Ritabrata Bhattacharya completed a BTech in electronics and communication from Vellore Institute of Technology, India, in 2009 and joined the Centre for Applied Research in Electronics, Indian Institute of Technology (IIT) Delhi, where he is currently working towards his PhD degree in multifunctional radio frequency integrated circuits. His research interests are the design of CMOS based low noise amplifiers and power amplifiers.

E-mail: [email protected]

Ananjan Basu

Ananjan Basu did his BTech in electrical engineering and his MTech in communication and radar engineering from IIT Delhi in 1991 and 1993, respectively, and PhD in electrical engineering from University of California, Los Angeles, in 1998. He has been employed at the Centre for Applied Research in Electronics, IIT Delhi. His specialisation is in microwave and millimetre-wave component design and characterisation including CMOS based transceivers.

E-mail: [email protected]

Shiban K. Koul

Shiban K. Koul is a professor in the Centre for Applied Research in Electronics at the IIT Delhi. He is the author/co-author of more than 100 research papers and seven state-of-the art books. He is the editor-in-chief of the Journal of the Institution of Electronics and Telecommunication Engineers (IETE) India (Electromagnetics Section). He is on the editorial boards of the Journal of IETE, International Journal of RF and Microwave Computer-Aided Engineering, and the Microwave and Optical Technology Letters. Dr Koul is a fellow of the Indian National Academy of Engineering (INAE), fellow of the Institution of Electronics and Telecommunication Engineers (India), and fellow of IEEE, USA. He is recipient of several prestigious awards/accolades. His current research includes microwave and millimetre-wave circuit design using suspended strip-line and dielectric integrated guides and RF MEMS.

E-mail: [email protected]