Exploring the Asymmetric Characteristics of a Double Gate MOSFET with Linearly Graded Binary Metal Alloy Gate Electrode for Enhanced Performance

ABSTRACT

The present boon in the research field of nanoscale device physics is attributed to a large extent by the development of non-conventional multiple gate MOS devices due to increased device packing density and enhanced gate electrostatic control over the channel. In this work, we have investigated the attributes of an asymmetric Double Gate metal oxide semiconductor field effect transistor (MOSFET) incorporating the novel theory of work function engineering by the continuous horizontal variation of mole fraction in a binary metal alloy gate in a fully depleted Double Gate MOSFET. A two-dimensional analytical modeling of this Linearly Graded Asymmetric Double Gate MOSFET structure has been done to formulate a simplified expression for short channel threshold voltage, and an overall performance analysis of our proposed device has been presented to establish the superiority of our proposed structure in terms of superior short channel effect mitigation and a significant reduction in threshold voltage. The results obtained from our analytical analysis are found to be in good agreement with the simulation results, thereby, establishing the accuracy of our model.

KEYWORDS:

• Asymmetric Double Gate MOSFET
• Effective conducting path
• Threshold voltage
• Work function engineering

ACKNOWLEDGMENTS

Saheli Sarkhel thankfully acknowledges the financial support obtained in the form of State Research Fellowship from the Department of Electronics and Telecommunication Engineering, Jadavpur University.

DISCLOSURE STATEMENT

No potential conflict of interest was reported by the authors.

Additional information

Funding

West Bengal State Research Fellowship

Notes on contributors

Navjeet Bagga

Navjeet Bagga received his METelE degree from the Department of Electronics and Telecommunication Engineering, Jadavpur University, Kolkata, India in 2015.

E-mail: [email protected]

Saheli Sarkhel

Saheli Sarkhel is presently working as senior research fellow in the Department of Electronics and Telecommunication Engineering, Jadavpur University. Her research interest includes SOI/SON MOSFET and nano device modeling.

E-mail: [email protected]

Subir Kumar Sarkar

Subir Kumar Sarkar is presently a professor and former head in the Department of Electronics and Telecommunication Engineering, Jadavpur University. His research focus is in the areas of simulations of SOI/SON MOSFET and nano device modeling. He is a life fellow of the IE (I) and IETE, life member of ISTE, and senior member of IEEE.

E-mail: [email protected]