Influence of Time Delay on Pull-in Behaviour of Dither Optical Phase-Lock Loop

ABSTRACT

This paper analyses the impact of loop propagation delay on the pull-in behaviour of dither optical phase-lock loop (OPLL), neglecting the shot noise and phase noise of the loop. Analytical expressions of pull-in voltage, pull-in range, and acquisition time are presented in terms of all the parameters affecting the loop acquisition. Also, the influence of dither signal on the pull-in performance of dither OPLL is studied in the presence of loop propagation delay. It is found that the time delay associated with the filtering process within the loop gives rise to degradation in acquisition capability. In addition, dither signal allows pull-in from much larger frequency offset, decreases the acquisition time of the loop, and improves the acquisition characteristics of dither OPLL in terms of the pull-in voltage in the presence of loop delay. The tracking performance of dither OPLL regarding phase-error variance is investigated considering laser phase noise, photo-detector shot noise, and loop propagation delay. Simulation results are given in support of the analytical results.

KEYWORDS:

• Acquisition time
• Dither signal
• Loops natural frequency and open-loop frequency error
• Optical phase-lock loop
• Pull-in range

DISCLOSURE STATEMENT

No potential conflict of interest was reported by the authors.

Additional information

Notes on contributors

Abhijit Banerjee

Abhijit Banerjee is an associate professor at the Department of Electronics and Instrumentation Engineering, Academy of Technology, Adisaptagram, Hooghly, West Bengal. He has BTech and MTech degrees from The Institute of Radio Physics and Electronics, Calcutta University. He received the PhD degree from Calcutta University in November, 2014. He has more than 10 years of teaching experience. He has contributed more than 20 research papers to national and international conferences and journals. His areas of interest are microwave photonics, optical communication, and signal processing.

Corresponding author. E-mail: [email protected]

Baidyanath Biswas

Baidyanath Biswas is the chairman of the Education Division, SKF Group of Institutions, Mankundu, Hooghly (www.skf.edu.in), former national lecturer (UGC), Emeritus fellow (AICTE), visiting faculty at the University of Minnesota (USA), founder prof-in-charge UIT, Microwave Division (BU), CU gold medallist; URSI member: Commissions C, D, E and developing countries.

E-mail: [email protected]