A Low Power CMOS UWB LNA with Dual-band Notch Filter Using Forward Body Biasing

ABSTRACT

In this paper, two ultra-wide band (UWB) low noise amplifiers (LNAs) with out-of-band rejection between 2.4–10.2 GHz and forward body biasing technique for wideband application are designed and simulated in a standard 0.18 µm CMOS process. Simulation results of two types of LNA exhibit a maximum power gain of 13.6 and 14.9 dB with the input return loss lower than −9.8 and −11.3 dB from 3.1 to 10 GHz for a cascode and a cascade topologies, respectively. A minimum noise figure of 3.4 dB at frequency of 4.3 GHz and 3.1 dB at frequency of 4.1 GHz, IIP₃ of −3.3 and −12.3 dBm are obtained for the cascode and the cascade topologies, respectively. The power consumption of the cascode LNA with an output buffer is 17.5 mW from a 1.8 V voltage supply, while the cascade LNA with an output buffer dissipates 9.29 mW from a 0.9 V supply.

KEYWORDS:

• Cascade
• Dual-band notch filter
• Forward body biasing
• Ultra wide bands

Acknowledgements

The authors would like to express our sincere gratitude to authors of references [8], [14], [15], and [20].

Additional information

Notes on contributors

Maryam Babasafari

Maryam Babasafari received the BSc degree in communication engineering from Iran University of Karaj (KU), Iran in 2009, MSc and PhD degrees in electronics engineering from Zanjan University (ZNU), Iran in 2014 and 2017, respectively. She has been working in Standard Research Institute of Iran as an engineer since 2012. Her main interests include design and analysis of analog integrated circuits and UWB systems.

Mostafa Yargholi

Mostafa Yargholi received BSc degree in communication engineering from Iran University of Science and Technology (IUST), Iran in 2002, and later, MSc and PhD degrees in electronics engineering from Tarbiat Modares University (TMU), Iran in 2004 and 2009, respectively. He has been working with the Department of Electrical Engineering, University of Zanjan, since 2009, where he is now an associate professor and serves as the Head of the Electrical Engineering Group. His current research interests include designing of RF integrated circuits, ADCs, UWB systems, and CMOS integrated circuits. Email: [email protected]