New Electronically Tunable Low-frequency Quadrature Oscillator Using Operational Transresistance Amplifier

ABSTRACT

This paper describes, a new realization of electronically tunable low-frequency quadrature sinusoidal oscillator (LFSO) based on Operational transresistance amplifier (OTRA). The proposed structure employs two OTRAs, along with four resistors and three capacitors. The notable properties of the proposed oscillator are: (1) it bares independent controllability of frequency of oscillation (FO) through resistors without altering the condition of oscillation (CO) and vice versa; (2) suitable for MOS-C realization making FO electronically tunable (3) exhibits low passive sensitivities (4) enjoys good frequency stability properties. Besides, the roots of the characteristic equation are evaluated to calculate the condition for startup oscillations, which results in altering the property of uncoupling tuning between CO and FO to orthogonal tuning. Furthermore, the nonideal behaviour of proposed LFSO has been examined using single pole model of the OTRA. The proposed LFSO was simulated using Spectre in Cadence employing generic Process Design Kit (GPDK) 0.18 μm CMOS process. The post-layout, schematic-driven simulation results obtained agree firmly with the theoretical formulations. The total harmonic distortion (THD) is found to be below 3%.

KEYWORDS:

• Frequency stability
• Low-frequency quadrature Oscillator
• Layout
• Monte-Carlo analysis
• Operational transresistance amplifier (OTRA)
• Sensitivity

Additional information

Notes on contributors

Gurumurthy Komanapalli

Gurumurthy Komanapalli received his BTech (Electronics and Communication) from JNTU Kakinada, Andhra Pradesh and his MTech in VLSI design from Delhi Technological University (DTU) (formerly Delhi College of Engineering), New Delhi in 2014 and Currently, he is working towards a PhD degree from DTU. His research interests are in analog circuit design and microelectronics.

Rajeshwari Pandey

Rajeshwari Pandey is currently working as a professor in the Department of Electronics and Communication Engineering, Delhi Technological University, Delhi, India. She did her ME (Electronics and Control) from BITS, Pilani, Rajasthan, India and PhD from Faculty of Technology, Delhi University, India. Her research interests include analog integrated circuits and microelectronics. She has published papers in international, national journals of repute and conferences. She is a life member of IETE, ISTE, and member of IEEE, IEEE WIE for 10 years. Email: [email protected]

Neeta Pandey

Neeta Pandey received her ME in microelectronics from Birla Institute of Technology and Sciences, Pilani and PhD from Guru Gobind Singh Indraprastha University, Delhi. She has served in Central Electronics Engineering Research Institute, Pilani, Indian Institute of Technology, Delhi, Priyadarshini College of Computer Science, Noida and Bharati Vidyapeeth’s College of Engineering, Delhi in various capacities. At present, she is a professor in the ECE Department, Delhi Technological University. A life member of ISTE, and member of IEEE, USA, she has published papers in international, national journals of repute and conferences. Her research interests are in analog and digital VLSI design. Email: [email protected]