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Articles

Utilizing Sneak Paths for Memristor Test Time Improvement

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Abstract

Memristor technology is becoming an attractive option for memory architectures, in-memory computing, and logic applications due to their non-volatility, high density, and low power operation. However, these memristor-based devices are prone to defects because of the non-deterministic nature of nano-scale fabrication. This research describes a methodology for testing memristor circuits for fault detection and fault diagnosis using a unique property of memristor crossbar circuits – sneak paths. This research focuses on the stuck-at low resistance and stuck-at high resistance faults for our analysis. A 3 × 3 crossbar array was used as an example to demonstrate our fault dictionary-based diagnosis approach with improved test time. Our results show that fault diagnosis can be achieved only in three test vectors for the best case and a worst-case of m + 1 test vectors for an m × n array where m > n.

Additional information

Notes on contributors

Rasika Joshi

Rasika Joshi was born in Pune, India, in 1990. She received the BS degree from University of Pune, India in 2012 and MS degree from University of Wisconsin-Madison in 2014. She is currently pursuing her PhD degree from Electrical Engineering Department at Portland State University. Her current research is in testing memristor circuits for fault detection, fault diagnosis and coverage improvement analysis.

John M. Acken

John M Acken (M’17) became a Student Member of IEEE in 1976, a Member (M) from 1978 through 1997 and has returned to IEEE in 2017. He received the BS and MS in electrical engineering from Oklahoma State University in 1976 and 1978, respectively. He received the PhD degree in electrical engineering from Stanford University in 1988. He is currently a research professor at Portland State University in Portland Oregon. From 1999 through 2015, he was at Oklahoma State University where he was advisor for several MS thesis on testing and information security. His current research interests include digital testing, memristor circuits, information security for cloud and edge computing, speaker recognition. Dr Acken has served on several conference committees including: IEEE ICCAD (Finance Chair for ICCAD90, Audio-Visual Chair forICCAD87, Treasurer for ICCAD86, ICCAD85, and ICCAD84, and Registration Chair for ICCAD83, Session Chair for ICCAD93), IEEE ITC (Session Chair for ITC90, ITC91 and ITC92), Session Chair for CCCT 2008. Dr. Acken also served as a TWG member for Design and Test Road map of SIA (Semiconductor Industry Association) in 1994. Email: [email protected]

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