RNS Comparison via Shortcut Mixed Radix Conversion: The Case of Three 4-Moduli Sets {2^{n + k}, 2ⁿ ± 1, m} (m ϵ {2^{n + 1} ± 1, 2^{n − 1} − 1})

Abstract

Comparison of numbers represented in residue number systems (RNS) is considered as a difficult RNS operation. However, RNS comparators faster than the straightforward “convert-to-binary and compare” alternative have been recently reported. Nevertheless, we present improved RNS comparators for three balanced 4-moduli sets (listed in the title, above) based on shortcut mixed radix conversion. Synthesis results show considerable improvements regarding some figures of merit. For example, 29% (24%) speedup (cost reduction) for the first moduli set, 18% cost reduction for the second, 28% lower power dissipation and 64% energy saving regarding the third one in comparison to previous works are achieved.

KEYWORDS:

• Mixed radix conversion
• Number comparison
• Residue number system (RNS)
• VLSI realization

Additional information

Notes on contributors

Z. Torabi

Zeinab Torabi received her PhD degree in computer system architecture from Shahid Beheshti University, Tehran, Iran, in 2016. She is currently an assistant professor of computer engineering in Department of Computer Engineering, Shahid Rajaee Teacher Training University, Tehran, Iran. Her research interests include computer arithmetic, residue number system, design and analysis of algorithms.

G. Jaberipur

Ghassem Jaberipur, is a professor of computer engineering in the Department of Computer Science and Engineering of Shahid Beheshti University, Tehran, Iran. He received his BS in electrical engineering and PhD in computer engineering from Sharif University of Technology in 1974 and 2004, respectively, MS in engineering from UCLA in 1976, and MS in computer science from University of Wisconsin, Madison, USA in 1979. His main research interest is in computer arithmetic. Dr Jaberipur is also affiliated with the School of Computer Science, Institute for Research in Fundamental Sciences (IPM), in Tehran, Iran. E-mail: [email protected]

S. A. Mirnaseri

Seyedeh Atefeh Mirnaseri received the BS degree in computer hardware engineering from Guilan University, Guilan, Iran, in 2015, and the MS degree in computer architecture from Shahid Beheshti University, Tehran, Iran, in 2018. She is currently teaching in Amol University of Special Modern Technologies, Mazandaran, Iran. Her current research interest are low power logic circuits design and artificial intelligence. E-mail: [email protected]