Nanowire Transistors: A Next Step for the Low-Power Digital Technology

Abstract

As conventional Complementary Metal Oxide Semiconductor (CMOS) reaches extreme limitation to implement the digital circuits with high density and low power dissipation, alternate devices are necessary. To keep Moore’s Law alive and to implement the processors with tiny devices, the researchers are trying to produce nano-devices, alternatives to conventional devices. Nanowire is a most prominent device to replace the CMOS at nano-scale for the low-power digital technology among the emerging Nanodevices. Transistors designed with Nanowire structures achieve a tradeoff between the power and density to implement the digital circuits. This paper is focused on reviewing the details of the synthesis of nanowire, few dominant applications of the nanowire, and nanowire mechanics. Initially, the growth pattern and controlling the Nanowire dimensions are discussed under the synthesis of nanowire. This is followed by a brief overview of nano-photonics which plays a key role in optical communications. Further, the mechanical properties, applications of nanowire, and the gate structures are highlighted.

KEYWORDS:

• International Roadmap for Devices
• Nanowire
• Field Effect Transistor
• Gate all-around transistor
• Density and low-power digital technology
• Applications of nanowires

ACKNOWLEDGEMENT

The Authors are indebted to all the researchers working in this domain to pave out this research attempt.

Additional information

Notes on contributors

D. Ajitha

D Ajitha is working as associate professor in Sreenidhi Institute of Science and Technology, Hyderabad. She received a Bachelor of Technology degree from JNTU, Hyderabad in 2006 and MTech in VLSI system design from JNTUA, Ananthapuramu in 2009. She obtained her PhD from the Department of Electronics and Communication Engineering, JNTUCEA, Ananthapuramu, India. She has lifetime professional memberships in IETE and ISTE. She has published more than 25 papers in international conferences and Journals. Her areas of research interest are digital logic circuits in the nano-field, low-power VLSI and reversible logic.

K. N. V. S. Vijaya Lakshmi

K N V S Vijaya Lakshmi is working as assistant professor in the Department of Electronics and Communication Engineering, Sri Vasavi Engineering College, Tadepalligudem, Andhra Pradesh, India. She obtained MTech degree in digital electronics and communication system from JNTU Kakinada in 2014 and BTech degree in electronics and communication engineering from JNTU Hyderabad in 2006. She has published 8 papers in international journals. Her areas of interest are IoT, digital electronics, VLSI technology, low power VLSI and communication systems. She is a member of ISTE, ISRD, GRDS, IAENG and IRED. Email: [email protected]

K. Bhagya Lakshmi

K Bhagya Lakshmi is working as assistant professor in Sasi Institute of Technology and Engineering, Tadepalligudem, Andhra Pradesh, India, obtained her Master of Technology in VLSI system design. She worked as in-charge of VLSI Centre of Excellence, C V Raman Global University, Bhubaneshwar and handled a number of students’ projects in VLSI. Her interested areas of research are VLSI digital designs and nano technology. Email: [email protected]