Lot-to-order matching for a semiconductor assembly and test facility

Abstract

This paper is motivated by the problem of assigning semiconductor fabrication wafer lots to customer orders of various sizes. The goal of this research is to develop a method for deciding, on a given day, which orders to fill and the assignment of available lots to orders. This decision should be made in order to effectively utilize the capacity of the assembly/test facility, to minimize excess product that must be sent to a storage facility, and to maximize on-time delivery of customer orders. This problem can be formulated as an integer program with a nonlinear objective and nonlinear constraints. Because of the complexity of this formulation we decompose the problem into two integer linear programs and solve them in sequence by heuristic methods. The performance of the heuristic is analyzed using a representative data set. Based on this analysis, it is shown that our greedy heuristic performs significantly better than current practice.