Abstract
This article presents a three-phase methodology for scheduling assembly and test operations for semiconductor devices. The facility in which these operations are performed is a re-entrant flow shop consisting of several dozen to several hundred machines and up to a 1000 specialized tools. The semiconductor devices are contained in lots, and each lot follows a specific route through the facility, perhaps returning to the same machine multiple times. Each step in the route is referred to as a “pass.” In the first phase of the methodology an extended assignment model is solved to simultaneously assign tooling and lots to the machines. Four prioritized objectives are considered: minimize the weighted sum of key device shortages, maximize the weighted sum of lots processed, minimize the number of machines used, and minimize the makespan. In the second phase, lots are optimally sequenced on their assigned machines using the same prioritized objectives. Due to the precedent relations induced by the pass requirements, some lots may have to be delayed or removed from the assignment model solution to ensure that no machine runs beyond the planning horizon. In the third phase, machines are reset to allow additional lots to be processed when tooling is available. The methodology was tested using data provided by the Assembly and Test facility of a leading manufacturer. The results indicate that high-quality solutions can be obtained within 1 hour when compared with those obtained with a greedy randomized adaptive search procedure. Cost reductions were observed across all objectives and averaged 62% in the aggregate.
Additional information
Notes on contributors
Zhufeng Gao
Zhufeng Gao received a B.S. degree in 2007 in Mathematics and an M.S. degree in 2009 in Operations Research both from Tianjin University, China. He received a Ph.D. in 2014 in the Operations Research & Industrial Engineering Program at the University of Texas at Austin. His past work focused on scheduling of back-end operations in the semiconductor industry. His research interests includes mixed-integer programming, large-scale optimization, and their applications in semiconductor manufacturing, healthcare, and transportation.
Jonathan F. Bard
Jonathan Bard is a Professor of Operations Research & Industrial Engineering in the Mechanical Engineering Department at the University of Texas at Austin. He holds the Industrial Properties Corporation Endowed Faculty Fellowship and serves as the Associate Director of the Center for the Management of Operations and Logistics. He received a D.Sc. in Operations Research from The George Washington University and has previously taught at the University of California–Berkeley and Northeastern University. His research centers on the design and analysis of manufacturing systems, personnel scheduling, logistics, and algorithms for large-scale integer programs. He is the founding Editor of IIE Transactions on Operations Engineering and is on the editorial board of several other journals. He is a fellow of IIE and INFORMS and a registered professional engineer in the State of Texas.
Rodolfo Chacon
G. Rodolfo Chacon's current interests are on improving performance in semiconductor back-end operations with focus on delivery within the World Wide Technology and Manufacturing Group IT of Texas Instruments. He is currently implementing dispatching systems in the assembly and test facilities in Asia. He has also held automated material handling systems and industrial engineering management positions at 300mm DMOS6 Logic Fab and DFAB Analog Fab at Texas Instruments since 2003. Previously at Sony Semiconductor of America, he was Manager of Factory Automation and the Manufacturing Science Research Center after holding engineering positions in manufacturing science, industrial engineering, and strategic planning starting in 1990. At AMD, San Antonio, Texas, he was the facilitator of statistical process control. He received his Ph.D. (1989) and M.S. (1986) degrees in Industrial Engineering from the University of Texas at Arlington and a B.S. (1981) degree in Industrial Engineering from the University of Lima, Peru.
John Stuber
John Stuber received a B.S. degree from the University of Kansas in 1989, an M.S. degree from Stanford University in 1990, and a Ph.D. from the University of Texas at Austin in 1996, all in Chemical Engineering. After a year with IBM in the ASTC, he joined Texas Instruments, Inc., as a process control engineer. He currently leads TI's 300-mm run-to-run control efforts and manages sponsored projects for advanced process control in the semiconductor industry.