Abstract
New concept of non-volatile logic integrated circuit system using MFISFETs is proposed first in this paper, in which information in CMOS digital circuits can be protected from accidental or planned power outages and restored after the power recovers. The basic operation of the proposed system has been ascertained using Simulation Program with Integrated Circuit Emphasis (SPICE) simulator. A HSPICE macro model of Metal- Ferroelectric-Insulator-Semiconductor Field-Effect Transistors (MFISFETs) using Schmitt trigger model is created and applied to the circuit simulation to test its validity. The states of logic nodes in the volatile CMOS digital circuits can be stored onto corresponding MFISFETs when power shuts off abruptly and be restored immediately when power-failure recovers, thus the whole system continues to work as if no power outrage had happened. As a result, the nonvolatile logic function is realized with MFISFETs and the feasibility of application in VLSI digital systems is demonstrated.
ACKNOWLEDGMENTS
This work was supported by the Chinese National Natural Science Fund Project (60206005) and Shanghai Youth Technology Project (02QD14009).