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ABSTRACT
In this paper, we first applied the Chemical Mechanical Polishing (CMP) and post-CMP cleaning processes to the planarization of ferroelectric film in order to obtain good planarity of electrode/ferroelectric film interface for ferroelectric random access memories (FRAM) applications.
We investigated the structural and electrical characteristics of MOCVD PZT films grown on Ir bottom electrode before and after CMP process. The surface roughness of 100 nm PZT thin film was so distinctly reduced by CMP process that RMS and peak-to-valley values decreased from 4 nm and 50 nm to 0.2 nm and 5 nm, respectively. Moreover leakage current and retention characteristics of polished ferroelectric capacitors were improved by reducing PZT film roughness. Since high leakage current has been a main obstacle in operating thin PZT ferroelectrics, this indicates that PZT surface roughness produced by MOCVD process should be minimized for acquiring low voltage of FRAM application. No degradation in polarization hysteresis and fatigue characteristics of polished PZT capacitors was observed when favorable polishing process condition such as low down-pressure and slow table-speed was applied. In addition, post-CMP cleaning with an appropriate cleaning solution effectively removed slurries on PZT film without any further degradation. These results suggest that PZT CMP and post-CMP cleaning will be useful tool for acquiring highly-planarized thin MOCVD PZT film for next generation FRAM application.