Abstract
General expressions are derived to describe the electrical behaviour of an amorphous silicon Schottky barrier in an admittance experiment. These expressions incorporate the effects of free-carrier transport and the processes of electron capture and emission at gap states. From these expressions, it is argued that free-carrier transport will only affect the charge response in the admittance measurement when the signal-measuring frequency approaches the inverse of the bulk-dielectric relaxation time of the amorphous silicon. At lower frequencies only capture and emission at gap states need be considered.
The calculations described by Archibald and Abram, appropriate for low-signal frequencies, are extended in this paper to include the cases where the barrier is heavily doped and when large d.c. biases are applied. Also, two simple procedures are described for finding the distribution of gap states N(E) from admittance-frequency plots. It is shown that the generated N(E) are, to a good approximation, self-consistent with the original admittance calculation.
