Single-phase, 17-Level Hybridized Cascaded Multi-level Inverter

Abstract

This article proposes a single-phase, 17-level, cascaded multi-level inverter topology. The multi-carrier, phase disposition pulse-width modulation scheme is employed to generate the gating signals for the power switches. Operational principles with switching functions are given. By controlling the modulation index, the desired number of levels: 3 through 17, of the inverter's output voltage can be achieved. The validity of the proposed cascaded multi-level inverter is verified through simulation and experimental results.

Keywords:

• inverter
• multi-level
• pulse-width modulation
• H-bridge