Modeling and Simulation of Electronic Packages Subjected to Drop Impact

Abstract

Board level solder joint reliability performance during drop test is a critical concern to semiconductor and electronic product manufacturers, especially for handheld electronic products. These handheld electronic products are more prone to being dropped during their useful service life because of their small size and light weight. The electronic packages used in portable devices are susceptible to solder joint failures, induced by a combination of printed circuit board (PCB) bending and mechanical shock during impact. The dropping events not only induce mechanical failures in the housing of the device, but also lead to failure of PCB and components mounted on it. This work deals with: (a) Development of a simulation model of complete drop block with printed circuit board and plastic ball grid array (PBGA) assembly, which resembles actual drop test (free fall); (b) Development of an Input-G method for simulating the PCB dynamic responses; and (c) Comparison of results of free fall and Input-G methods. From the simulation results it was found that the mechanical shock causes multiple PCB bending and induce stresses in the solder balls of PBGA package. The solder balls at the outer rows of the PBGA package were subjected to maximum stress. Comparison of free fall drop and Input-G method results revealed that, the Input-G method uses less computer memory, takes less time to solve and it is simple to simulate the drop process.

Keywords:

• Free Fall Drop
• PBGA Package
• PCB
• Input-G
• Pulse Duration
• G-Level