Performance analysis and structured parallelisation of the space–time adaptive processing computational kernel on multi-core architectures

Abstract

The development of radar systems on general-purpose off-the-shelf parallel hardware represents an effective means of providing efficient implementations with reasonable realisation costs. However, the fulfilment of the required real-time constraints poses serious problems of performance and efficiency: parallel architectures need to be exploited at best, providing scalable parallelisations able to reach the desired throughput and latency levels. In this paper we discuss the implementation issues of the computational kernel of a well-known radar filtering technique – the space–time adaptive processing – on today's general-purpose parallel architectures (multi-/many-core platforms). In order to address the performance constraints imposed by the real-time implementation of this filtering technique, we apply a structured approach (structured parallel programing) to develop parallel computations as instances and compositions of well-known parallelisation patterns. This paper provides a thorough description of the implementation issues and discusses the performance peaks achievable on a broad range of existing multi-core architectures.

Keywords::

• space–time adaptive processing
• tile algorithms
• multi-core architectures
• structured parallel programing
• performance evaluation

Acknowledgements

Many thanks to Dr Achille Peternier and Prof. Walter Binder of the University of Lugano (USI), Switzerland, for granting us access to the IBM POWER7 server for conducting our experiments.