Abstract
A novel 3-D structure for Superjunction (SJ) VDMOS which results in high avalanche energy (EAS) under unclamped inductive switching condition without degrading the ON-state current capability is reported in this paper. The proposed structure fabricated in deep trench technology has segmented n+ source region and strip gate. The novel structure can suppress the hole current path beneath the n+ source region under avalanche breakdown condition because of the p+ region which is located between the segmented n+ source regions. In order to verify the mechanism, numerous 3-D simulations are performed using Sentaurus TCAD. As a result, the measurement shows that the robust deep trench SJ-VDMOS improved the EAS by more than six times compared with the conventional structure.
Keywords:
Additional information
Notes on contributors
Jing Zhu
Jing Zhu received M.S. degree from Southeast University, Nanjing, China, in 2011. He is currently pursuing Ph.D. degree in School of Electronic Science and Engineering from Southeast University. His research interests focus on power devices and ICs. E-mail: [email protected]
Longxing Shi
Longxing Shi was born in Jiangsu, China, in 1964. He received the B.S., M.S., and Ph.D. degrees from Southeast University, Nanjing, China, in 1984, 1987, and 1992, respectively, all in electronic engineering. He is currently a Professor and the Dean of Integrated Circuit (IC) College, Southeast University. His research interests include power IC, RF device design, and system-on-a-chip design. He is the author or coauthor of more than 60 papers and the holder of 20 Chinese patents. E-mail: [email protected]
Long Zhang
Long Zhang received the B.S. degree from China University of Mining Technology, Xuzhou, China, in 2010. Now, he is studying for his master’s degree in Southeast University. His research interests in power devices and reliability.[email protected]
Weifeng Sun
Weifeng Sun received the B.S., M.S., and Ph.D. degrees in electronic engineering from Southeast University, in 2000, 2003, and 2007, respectively. His research interests mainly include new power device design, power IC, power system, power device model, power IC and RF device design. He has authored 29 Chinese patents and has authored or coauthored more than 40 papers. E-mail: [email protected]
Shengli Lu
Shengli Lu was born in Jiangsu, China, in 1965. He received the B.S., M.S., and Ph.D. degrees from Nanjing University, Nanjing, China, in 1987, 1990, and 1994, respectively, all in physics. He is currently a Professor and the Vice-Director of National Application-Specified Integrated Circuit System Engineering Research Center, Southeast University, Nanjing. His research interests include power IC and system-on-a-chip design. He is the author or coauthor of more than 20 papers and the holder of five Chinese patents. E-mail: [email protected] E-mail: [email protected]