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Original Articles

An Intelligent Adaptive Arbiter for Maximum CPU Utilization, Fair Bandwidth Allocation and Low Latency

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Pages 48-54 | Published online: 01 Sep 2014
 

Abstract

Rapid advancement in the world of microprocessor necessitates solving the bus contention in a most efficient manner. The major challenge is to reduce the latency of the system and to achieve a fair bandwidth allocation using maximum CPU utilization. Combination of Adaptive Arbitration (AA) algorithm and the processors according to their traffic behavior can be one of the feasible options to tackle the aforesaid problems due to its fair bandwidth allotment and low system latency. This article provides a comprehensive picture of the global scenario of AA algorithm for fair bandwidth allocation so as to enable researchers to decide the direction of further investigation. Some of the works published so far in this area are reviewed, classified according to their objectives, and presented in an organized manner with general conclusion.

Additional information

Notes on contributors

M. Nishat Akhtar

M. Nishat Akhtar received his B.E from VTU, Karnataka. Currently, he is an M.S student in Collaborative Microelectronic Design and Excellency Centre at Universiti Sains Malaysia. His research interests include system-on-chip architectures, embedded systems, and high performance computing. E-mail: [email protected]

Othman Sidek

Othman Sidek holds a PhD (Info. Sys. Eng.) from Bradford University in England. He has served Universiti Sains Malaysia since 1984 as a lecturer, researcher, and administrator. Prior to joining USM, he was a trainee engineer with Multinational Companies and continued to take very active role in both academic and university-industry research collaborations. He is currently focusing on 3 main research areas: FPGA/Embedded System/ Wireless Sensor Network (WSN), VLSI design/ASIC Design, and Micro-Electro Mechanical Systems (MEMS). E-mail: [email protected]

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