Abstract
Charge Coupled Devices (CCDs) are used in imaging as they have advantages over conventional bulky tube type TV cameras. The complementary metal oxide semiconductor (CMOS) based image sensors, passive pixel sensors (PPS), and active pixel sensor (APS) have advantages in implementation. This makes the APS competitive with CCDs. However, APS is not popular because of the poor All factor and lack of resolution. With the development of image sensor technology, digital pixel sensor (DPS) has overcome all problems associated with CCDs and CMOS-APS image sensor. In DPS, comparator and memory are implemented on chip for each pixel. This results in benefits in terms of power, pixel size, fill factor and resolutions. This paper analyses earlier DPS pixel with an analog comparator and inverter-based comparator. The limitations reported in the analysis of analog comparator are overcome using cascaded CMOS inverter-based comparator. The cascaded CMOS inverter is built with proper adjustment of Width (W) to Length (L) ratio. This adjustment sets the threshold voltage ‘Vth ’ that remains fixed for the pixel (in our case Vth is equal to 2.2V). This cascaded inverter based comparator is called as threshold inverter quantizer (TIQ) and is further analyzed with biasing for high gain. Four-pixel and 16-pixel array design is done using TIQ based pixel. Extensive simulation of the TIQ based pixel array is done and results are reported for current and power dissipation.
Additional information
Notes on contributors
Y. V. Chavan
Y. V. Chavan completed his B.E. in 1989 and M. Tech. in 1999 from VNIT, Nagpur. Presently he is working as an Assistant Professor at MAE, Alandi, Pune. He is pursuing his Ph.D. at research Center SGSITS, Indore under RGPV, Bhopal. He worked as lecturer at Pravara Rural Engg. Collete, Loni (1990–1997) and as Senior lecturer at Amrutvahini College of Engg., Sangamner (1997–2005). His area of interest is Computer Vision, Machine Vision system modeling and simulation. He published Six research papers in international Journals and about six papers in the National and International Conferences. In other area of interest he has authored a book on Computer Network. He is counselor of MAE-IEEE student branch which is the largest branch in Bombay section. He is also Life member for ISTE. E-mail: [email protected]
D. K. Mishra
D. K. Mishra received his B.E., M.E. and Ph.D. degrees from Devi Ahilya Vishva Vidhyalaya in 1979, 1984 and 2000 respectively. Presently he is a Professor and Head, Electronics and Instrumentation Engg., SGSITS, Indore (M.P.) India. He worked with ISRO, Bangalore (1981–1988) contributed for design and development of Microprocessor based Electronics Instrumentation for Scientific Payloads on board Indian satellites SROSS-1and SROSS-2 (stretched Rohini Satellites Series 1 and 2) to carry out Spectral and Temporal analysis of Gamma Ray Burst. He also worked at ISRO,Ahmedabad (1988–90) for IRS (Indian Remote Sensing) for design and development of camera Electronics for IRS. He has published 11 papers in International Journals and 15 papers in National and International conferences. He is Life member of Institution of Engineers (India), IETE (India). His area of interest is E&I and VLSI. E-mail: [email protected]