Systematic Width Determination for the Design of Power-Constrained Noise Optimization Inductively Degenerated Low Noise Amplifier

Abstract

Systematic width determination for the inductively degenerated low noise amplifier (IDLNA) was implemented using power-constrained noise optimization (PCNO) technique. Using drain current for short channel equation, the power dissipated (P_D) as a function of gate overdrive (V_OV) expression was derived. This expression was further arranged to represent P_D as a function of input stage quality factor (Q_S). The two relations were translated into contours which were generated at fixed noise figure (NF). By means of manipulating the same equations, the NF as a function of Q_S was derived. The contours were generated using the parameters specified for Silterra’s 0.18 μm CMOS process for Wideband-Code Division Multiple Access (W-CDMA) application. The P_D versus V_OV contours show that the NF of the LNA can be improved if P_Dis increased. These contours also illustrate that for a W-CDMA with a requirement of below 2.5 dB of NF, the V_OVis in the range of 46–115 mV. The P_D and NF versus Q_S contours show that minimum P_D for each NF and minimum NF at each P_D is maintained at Q_S equal to 4, independent of the process and operating frequency. This result is verified by derivations and comparisons with a referenced article. With the optimum Q_S known, the calculated transistor’s width is 330 μm to provide an NF of 1 dB at 6 mW of power.

Keywords:

• Inductively degenerated low noise amplifier
• Noise contour
• Optimization technique
• Power-constrained noise
• W-CDMA

Additional information

Notes on contributors

Norlaili Mohd Noh

Norlaili Mohd Noh received her B.Eng in Electrical Engineering from Universiti Teknologi Malaysia (UTM) in 1987, M.Sc and Ph.D degrees from Universiti Sains Malaysia (USM) in 1995 and 2009, respectively. She is currently a senior lecturer with the School of Electrical and Electronic Engineering USM. Her current research interests include low noise amplifier design, analog circuit design and Radio Frequency Integrated Circuit (RFIC) design. E-mail: [email protected]

Tun Zainal Azni Zulkifli

Tun Zainal Azni Zulkifli received his B.Sc, M.Sc and Ph.D degrees from Washington University in St Louis, USA in 1995, 1999 and 2002, respectively. He is currently an associate professor with the School of Electrical and Electronic Engineering USM. His current research interests include Radio Frequency Integrated Circuit (RFIC) design notably in the design of LNA, QVCO E-mail: [email protected]