Discrete Wavelet Transform and Modified Chaotic Key-based Algorithm for Image Encryption and its VLSI Realization

Abstract

Chaos-based encryption may offer new quality in secure data transmission. A recently proposed Chaotic Key-Based Algorithm (CKBA) has been shown to be unavoidably susceptible to chosen/known plaintext attacks and ciphertext-only attacks. In this paper, Discrete wavelet transform and Modified Chaotic Key-Based Algorithm are proposed to enhance the security of CKBA. The enhanced security of the proposed algorithm is analyzed through cryptanalysis. Furthermore, Very large scale integration (VLSI) architecture of the proposed algorithm is designed. The VLSI architecture is implemented on an image using ModelSim to demonstrate the effectiveness of the proposed scheme.

Keywords:

• Chaos
• Cryptography
• Image encryption
• Image decryption
• Very large scale integration

Additional information

Notes on contributors

K. Deergha Rao

K. Deergha Rao received his B.E (Elect. Engg.). and M.E (Control Systems) degrees from Andhra University, Visakhapatnam, India, in 1977 and 1980 respectively, and Ph.D. degree in electronics and communication engineering from Osmania University, Hyderabad, India, in 1993. He is a senior member of IEEE. He is the chairman of communications and Signal processing societies joint chapter of IEEE Hyderabad Section.

He is presently a professor in the Research and Training Unit for Navigational Electronics, Osmania University. He served as a postdoctoral fellow and part-time professor from March 1999 to March 2003 in the Dept. of ECE, Concordia University, Montreal, Canada. As part-time professor, he has taught the courses Digital Signal Processing and Channel coding to the Master and Ph.D students at, Concordia University.

He has presented papers at IEEE International conferences several times in USA, Switzerland, and Russia. His research interests include GPS signal processing, Wireless channel coding, Blind Equalization, Robust Multiuser detection, OFDM UWB signal processing, Image processing, Cryptosystems, VLSI signal processing. So far one Ph.D was awarded under his guidance and presently nine students are working towards Ph.D under his guidance. He has more than 100 publications to his credit including 56 publications in IEEE journals and conference proceedings E-mail: [email protected]

Ch. Gangadhar

Ch. Gangadhar received his B.Tech. degree in Electronics and Communications Engineering in 1999 from Nagarjuna University, Guntur, India, and M.Tech. degree in VLSI System Design from National Institute of Technology, Warangal, India in 2003.

He is pursuing towards PhD in Osmania University, Hyderabad, India and working as Assoc. Professor in the Dept. of ECE, PVP Siddhartha Institute of Technology, Vijayawada, India. His research interests are in the area of new Signal Processing Approaches and VLSI Realizations. E-mail: [email protected]