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Original Articles

Aging Model for a 40 V Nch MOS, Based on an Innovative Approach

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Pages 191-196 | Published online: 01 Sep 2014
 

Abstract

Usually, aging models implemented in design kits are able to accurately describe parameter degradation only if kinetics during constant voltage stress is relatively simple; a methodology is proposed to extend aging simulation to a more complex behavior, and indeed implementable into a commercial software environment (in the case Eldo UDRM by Mentor Graphics). The methodology is applied to describe Ron drift of a 40 V Nch MOS transistor.

Additional information

Notes on contributors

Filippo Alagi

Filippo Alagi graduated in Physics at the University of Naples “Federico II” in 1987. Since then he joined STMicroelectronics, where he is still presently employed. His research interests are in the field of instability and ageing of elementary microelectronic devices.

E-mail: [email protected]

Roberto Stella

Roberto Stella graduated in Physics at the University of Milan in 1989, with a thesis work about the modeling of the VDMOS transistor.

Since 1989 he has been working in STMicroelectronics involved in the electrical characterization and modeling of devices in smart power technologies. Presently, he manages the group dedicated to the extraction of compact models for all BCD technologies. He published many papers about modeling and characterization of Smart Power technology devices.

E-mail: [email protected]

Emanuele Vigano

Emanuele Viganó graduated in Physics at the University of “Insubria” (Como) in 2002 with a thesis work about ultrathin oxides reliability. From 2003 to 2004, he worked in Accenture Technology Solutions. In 2004, he joined STMicroelectronics where he is presently employee as a modeling engineer. His main research interests are aging simulation and its implementation in compact device models.

E-mail: [email protected]

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