A Three-stage 3.1-10.6 GHz Low-noise Amplifier with High and Flat Gain, Consuming 3.7 mw power from a 1.8 V Supply Using Triple Coordination Technique

Abstract

A 3.1 to 10.6 GHz low-noise amplifier (LNA) in 0.18 μm technology is presented in this paper. The proposed LNA is implemented in a three-stage structure, including a current reusing cascode structure, a middle stage which compensates gain roll off in middle band and a buffer stage. The low-power dissipation of the design along with the high and flat gain provides a very appropriate combination in ultrawideband frequency design. The designed LNA achieves an average gain of 20 dB and a noise figure less than 2. The power consumption of the design is 3.7 mw.

Keywords:

• CMOS technology
• Flat gain
• High gain
• Low-noise Amplifier
• Low power consumption
• Ultrawideband

Additional information

Notes on contributors

Ebrahim Abiri

Ebrahim Abiri received the B.Sc. degree in Electronics Engineering from Iran University of Science and Technology (IUST) in 1992, M.Sc. degree from Shiraz University in 1996 and the Ph.D. degree in electronic from Iran University of Science and Technology (IUST) in 2007. He has authored more than 50 published technical papers in electronics and power electronics and 4 books. He has been with the Department of Electrical Engineering, Shiraz University of technology (SUTECH), since 2007. His current research activities include analog circuit design and power electronic. E-mail: [email protected]

Mohammad Reza Salehi

Mohammad Reza Salehi received the B.Sc. degree in electrical engineering from Amirkabir University of Technology (Tehran Polytechnique), Tehran, the M.Sc. degree in electrical engineering from Shiraz University, Shiraz, Iran, and the Ph.D. degree in optoelectronics at the ENSERG/INPG, France. He has authored and coauthored over 70 journal and conference papers and 7 books. He is currently a Member of IEEE. His research interests include optoelectronics, optomicrowaves and optical systems. E-mail: [email protected]

Zahra Mehrjoo

Zahra Mehrjoo received her B.Sc. degree in Electrical Engineering, in 2009 and M.Sc. degree in electrical engineering, Electronics branch in 2012, both from Shiraz University of Technology, Iran. Currently she continues her researches on analog circuit design, high frequency ultrawideband wireless receivers with the department of electrical and electronics engineering of Shiraz University of Technology and also experiences teaching of electrical engineering courses with several universities and high education institutes in Shiraz. E-mail: [email protected]